Add complete guide and all config variants

hackintosh-guide/docs/AcpiSamples/Source/SSDT-ALS0.dsl

@@ -0,0 +1,36 @@
+/*
+ * Starting with macOS 10.15 Ambient Light Sensor presence is required for backlight functioning.
+ * Here we create an Ambient Light Sensor ACPI Device, which can be used by SMCLightSensor kext
+ * to report either dummy (when no device is present) or valid values through SMC interface.
+ */
+DefinitionBlock ("", "SSDT", 2, "ACDT", "ALS0", 0x00000000)
+{
+    Scope (_SB)
+    {
+        Device (ALS0)
+        {
+            Name (_HID, "ACPI0008" /* Ambient Light Sensor Device */)  // _HID: Hardware ID
+            Name (_CID, "smc-als")  // _CID: Compatible ID
+            Name (_ALI, 0x012C)  // _ALI: Ambient Light Illuminance
+            Name (_ALR, Package (0x01)  // _ALR: Ambient Light Response
+            {
+                Package (0x02)
+                {
+                    0x64, 
+                    0x012C
+                }
+            })
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Return (0x0F)
+                }
+                Else
+                {
+                    Return (Zero)
+                }
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-AWAC-DISABLE.dsl

@@ -0,0 +1,25 @@
+/*
+ * For 300-series only. If you can't force enable Legacy RTC in BIOS GUI.
+ * macOS does yet not support AWAC, so we have to force enable RTC. Do not use RTC ACPI patch.
+ * 
+ * The Time and Alarm device provides an alternative to the real time clock (RTC), which is defined as a fixed feature hardware device.
+ * The wake timers allow the system to transition from the S3 (or optionally S4/S5) state to S0 state after a time period elapses.
+ * In comparison with the Real Time Clock (RTC) Alarm, the Time and Alarm device provides a larger scale of flexibility in the operation of the wake timers,
+ * and allows the implementation of the time source to be abstracted from the OSPM.
+ */
+
+DefinitionBlock ("", "SSDT", 2, "ACDT", "NOAWAC", 0x00000000)
+{
+    External (STAS, IntObj)
+
+    Scope (\)
+    {
+        Method (_INI, 0, NotSerialized)  // _INI: Initialize
+        {
+            If (_OSI ("Darwin"))
+            {
+                STAS = One
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-BRG0.dsl

@@ -0,0 +1,45 @@
+/*
+ * This table provides an example of creating a missing ACPI device
+ * to ensure early DeviceProperty application. In this example
+ * a GPU device is created for a platform having an extra PCI
+ * bridge in the path - PCI0.PEG0.PEGP.BRG0.GFX0:
+ * PciRoot(0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)
+ * Such tables are particularly relevant for macOS 11.0 and newer.
+ */
+
+DefinitionBlock ("", "SSDT", 2, "ACDT", "BRG0", 0x00000000)
+{
+    External (_SB_.PCI0.PEG0.PEGP, DeviceObj)
+
+    Scope (\_SB.PCI0.PEG0.PEGP)
+    {
+        /*
+         * This is a PCI bridge device present on PEGP.
+         * Normally seen as pci-bridge in I/O Registry.
+         */
+        Device (BRG0)
+        {
+            Name (_ADR, Zero)
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Return (0x0F)
+                }
+                Else
+                {
+                    Return (Zero)
+                }
+            }
+
+            /*
+             * This is an actual GPU device present on the bridge.
+             * Normally seen as display in I/O Registry.
+             */
+            Device (GFX0)
+            {
+                Name (_ADR, Zero)  // _ADR: Address
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-EC-USBX.dsl

@@ -0,0 +1,115 @@
+/*
+ * AppleUsbPower compatibility table for Skylake+.
+ *
+ * Be warned that power supply values can be different
+ * for different systems. Depending on the configuration
+ * these values must match injected IOKitPersonalities
+ * for com.apple.driver.AppleUSBMergeNub. iPad remains
+ * being the most reliable device for testing USB port
+ * charging support.
+ *
+ * Try NOT to rename EC0, H_EC, etc. to EC.
+ * These devices are incompatible with macOS and may break
+ * at any time. AppleACPIEC kext must NOT load on desktops.
+ * See the disable code below.
+ *
+ * While on some laptops, this kext is essential to access EC
+ * region for battery status etc. Please ignore EC related
+ * patches under the circumstance.
+ *
+ * Reference USB: https://applelife.ru/posts/550233
+ * Reference EC: https://applelife.ru/posts/807985
+ */
+DefinitionBlock ("", "SSDT", 2, "ACDT", "SsdtEC", 0x00001000)
+{
+    External (_SB_.PCI0.LPCB, DeviceObj)
+
+    /*
+     * Uncomment replacing EC0 with your own value in case your
+     * motherboard has an existing embedded controller of PNP0C09 type.
+     *
+     * While renaming EC0 to EC might potentially work initially,
+     * it connects an incompatible driver (AppleACPIEC) to your hardware.
+     * This can make your system unbootable at any time or hide bugs that
+     * could trigger randomly.
+     */
+
+    /**
+    External (_SB_.PCI0.LPCB.EC0, DeviceObj)
+
+    Scope (\_SB.PCI0.LPCB.EC0)
+    {
+        Method (_STA, 0, NotSerialized)  // _STA: Status
+        {
+            If (_OSI ("Darwin"))
+            {
+                Return (0)
+            }
+            Else
+            {
+                Return (0x0F)
+            }
+        }
+    }
+    **/
+
+    Scope (\_SB)
+    {
+        Device (USBX)
+        {
+            Name (_ADR, Zero)  // _ADR: Address
+            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
+            {
+                If ((Arg2 == Zero))
+                {
+                    Return (Buffer (One)
+                    {
+                        0x03                                             // .
+                    })
+                }
+
+                Return (Package (0x08)
+                {
+                    "kUSBSleepPowerSupply",
+                    0x13EC,
+                    "kUSBSleepPortCurrentLimit",
+                    0x0834,
+                    "kUSBWakePowerSupply",
+                    0x13EC,
+                    "kUSBWakePortCurrentLimit",
+                    0x0834
+                })
+            }
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Return (0x0F)
+                }
+                Else
+                {
+                    Return (Zero)
+                }
+            }
+        }
+    }
+
+    Scope (\_SB.PCI0.LPCB)
+    {
+        Device (EC)
+        {
+            Name (_HID, "ACID0001")  // _HID: Hardware ID
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Return (0x0F)
+                }
+                Else
+                {
+                    Return (Zero)
+                }
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-EC.dsl

@@ -0,0 +1,73 @@
+/*
+ * AppleUsbPower compatibility table for legacy hardware.
+ *
+ * Be warned that power supply values can be different
+ * for different systems. Depending on the configuration
+ * the values must be present in injected IOKitPersonalities
+ * for com.apple.driver.AppleUSBMergeNub. iPad remains being
+ * the most reliable device for testing USB port charging.
+ *
+ * Try NOT to rename EC0, H_EC, etc. to EC.
+ * These devices are incompatible with macOS and may break
+ * at any time. AppleACPIEC kext must NOT load on desktops.
+ * See the disable code below.
+ *
+ * While on some laptops, this kext is essential to access EC
+ * region for battery status etc. Please ignore EC related
+ * patches under the circumstance.
+ *
+ * Reference USB: https://applelife.ru/posts/550233
+ * Reference EC: https://applelife.ru/posts/807985
+ */
+DefinitionBlock ("", "SSDT", 2, "ACDT", "SsdtEC", 0x00001000)
+{
+    External (_SB_.PCI0.LPCB, DeviceObj)
+
+    /*
+     * Uncomment replacing EC0 with your own value in case your
+     * motherboard has an existing embedded controller of PNP0C09 type.
+     *
+     * While renaming EC0 to EC might potentially work initially,
+     * it connects an incompatible driver (AppleACPIEC) to your hardware.
+     * This can make your system unbootable at any time or hide bugs that
+     * could trigger randomly.
+     */
+
+    /**
+    External (_SB_.PCI0.LPCB.EC0, DeviceObj)
+
+    Scope (\_SB.PCI0.LPCB.EC0)
+    {
+        Method (_STA, 0, NotSerialized)  // _STA: Status
+        {
+            If (_OSI ("Darwin"))
+            {
+                Return (0)
+            }
+            Else
+            {
+                Return (0x0F)
+            }
+        }
+    }
+    **/
+
+    Scope (\_SB.PCI0.LPCB)
+    {
+        Device (EC)
+        {
+            Name (_HID, "ACID0001")  // _HID: Hardware ID
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Return (0x0F)
+                }
+                Else
+                {
+                    Return (Zero)
+                }
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-EHCx-DISABLE.dsl

@@ -0,0 +1,38 @@
+/*
+ * USB compatibility table for disable phantoms EHC1, EHC2.
+ *
+ * Attention!
+ * Only for 7,8,9-series chipsets and 10.11 and newer!
+ *
+ * To disable EHC1 and EHC2 - set an option "XHCI Mode" to "Enabled" in yours BIOS.
+ * If the "XHCI Mode" option is not available in yours BIOS or works incorrectly, then use this ACPI table.
+ * Disabling through BIOS is preferable whenever possible.
+ *
+ * WARN: for some motherboards you need to use either "EH1D = One" or "EH2D = One" but not both!
+ * This is because for some motherboards, device (EHC1 or EHC2) is used by macOS. Check the IOReg.
+ */
+DefinitionBlock ("", "SSDT", 2, "ACDT", "NOEHCx", 0x00001000)
+{
+    Scope (\)
+    {
+        OperationRegion (RCRG, SystemMemory, 0xFED1F418, One)
+        Field (RCRG, DWordAcc, Lock, Preserve)
+        {
+                ,   13, 
+            EH2D,   1, 
+                ,   1, 
+            EH1D,   1
+        }
+
+        Method (_INI, 0, NotSerialized)  // _INI: Initialize
+        {
+            // In most cases this patch does benefit all operating systems,
+            // yet on select pre-Windows 10 it may cause issues.
+            // Remove If (_OSI ("Darwin")) in case you have none.
+            If (_OSI ("Darwin")) {
+                EH1D = One  // Disable EHC1
+                EH2D = One  // Disable EHC2
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-HV-DEV.dsl

@@ -0,0 +1,791 @@
+/*
+ * Hyper-V device SSDT to disable unsupported devices under macOS on Windows Server 2019 / Windows 10 and newer.
+ *
+ * Windows 10 and newer define various objects conditionally, which are
+ * unsupported in older versions of macOS. All objects are enabled regardless
+ * of state in older versions, causing slow boot behavior and crashes during boot caused by AppleACPIPlatform.
+ *
+ * Windows 10 and newer also use ACPI0007 Device objects for CPUs, which macOS cannot detect.
+ * This SSDT redefines the first 64 as Processor objects.
+ * This may cause issues with other operating systems.
+ * 
+ * This SSDT defines _STA methods for all affected objects and disables them entirely, or enables only if
+ * the approprate register is set (enabled in Hyper-V).
+ *
+ * On Windows Server 2012 R2 / Windows 8.1 and older this SSDT is unnecessary and can be disabled along with associated patches.
+ *
+ * Requires the following ACPI patches:
+ * (1) Base:            \_SB.VMOD.TPM2
+ *     Comment:         _STA to XSTA rename (Hyper-V TPM)
+ *     Count:           1
+ *     Find:            5F535441 (_STA)
+ *     Replace:         58535441 (XSTA)
+ *     TableSignature:  44534454 (DSDT)
+ * (2) Base:            \_SB.NVDR
+ *     Comment:         _STA to XSTA rename (Hyper-V NVDIMM)
+ *     Count:           1
+ *     Find:            5F535441 (_STA)
+ *     Replace:         58535441 (XSTA)
+ *     TableSignature:  44534454 (DSDT)
+ * (3) Base:            \_SB.EPC
+ *     Comment:         _STA to XSTA rename (Hyper-V EPC)
+ *     Count:           1
+ *     Find:            5F535441 (_STA)
+ *     Replace:         58535441 (XSTA)
+ *     TableSignature:  44534454 (DSDT)
+ * (4) Base:            \_SB.VMOD.BAT1
+ *     Comment:         _STA to XSTA rename (Hyper-V battery)
+ *     Count:           1
+ *     Find:            5F535441 (_STA)
+ *     Replace:         58535441 (XSTA)
+ *     TableSignature:  44534454 (DSDT)
+ */
+
+DefinitionBlock ("", "SSDT", 2, "ACDT", "HVDEV", 0x00000000)
+{
+    //
+    // EC fields in DSDT
+    //
+    External (SCFG, FieldUnitObj)
+    External (TCFG, FieldUnitObj)
+    External (NCFG, FieldUnitObj)
+    External (SGXE, FieldUnitObj)
+    External (BCFG, FieldUnitObj)
+    External (PCNT, FieldUnitObj)
+
+    //
+    // Device and method objects in DSDT
+    //
+    External (\_SB.UAR1, DeviceObj)
+    External (\_SB.UAR2, DeviceObj)
+    External (\_SB.VMOD.TPM2, DeviceObj)
+    External (\_SB.VMOD.TPM2.XSTA, MethodObj)
+    External (\_SB.NVDR, DeviceObj)
+    External (\_SB.NVDR.XSTA, MethodObj)
+    External (\_SB.EPC, DeviceObj)
+    External (\_SB.EPC.XSTA, MethodObj)
+    External (\_SB.VMOD.BAT1, DeviceObj)
+    External (\_SB.VMOD.BAT1.XSTA, MethodObj)
+    External (\_SB.VMOD.AC1, DeviceObj)
+
+    //
+    // Duplicated from Windows 8.1 Hyper-V Generation 2 DSDT.
+    // Defines old-style Processor objects that macOS can use.
+    //
+    // PSTA will exist on 8.1 and older, and should block this SSDT from
+    // being loaded if used on older Hyper-V versions.
+    //
+    Scope (\_SB)
+    {
+        Method (PSTA, 1, Serialized)
+        {
+            If (LAnd (_OSI ("Darwin"), LLessEqual (Arg0, PCNT)))
+            {
+                Return (0x0F)
+            }
+
+            Return (Zero)
+        }
+
+        Processor (P001, 0x01, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x01)
+            Method (_STA, 0, Serialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P002, 0x02, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x02)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P003, 0x03, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x03)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P004, 0x04, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x04)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P005, 0x05, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x05)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P006, 0x06, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x06)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P007, 0x07, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x07)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P008, 0x08, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x08)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P009, 0x09, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x09)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P010, 0x0A, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x0A)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P011, 0x0B, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x0B)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P012, 0x0C, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x0C)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P013, 0x0D, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x0D)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P014, 0x0E, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x0E)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P015, 0x0F, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x0F)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P016, 0x10, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x10)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P017, 0x11, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x11)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P018, 0x12, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x12)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P019, 0x13, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x13)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P020, 0x14, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x14)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P021, 0x15, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x15)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P022, 0x16, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x16)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P023, 0x17, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x17)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P024, 0x18, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x18)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P025, 0x19, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x19)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P026, 0x1A, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x1A)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P027, 0x1B, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x1B)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P028, 0x1C, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x1C)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P029, 0x1D, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x1D)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P030, 0x1E, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x1E)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P031, 0x1F, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x1F)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P032, 0x20, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x20)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P033, 0x21, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x21)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P034, 0x22, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x22)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P035, 0x23, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x23)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P036, 0x24, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x24)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P037, 0x25, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x25)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P038, 0x26, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x26)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P039, 0x27, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x27)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P040, 0x28, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x28)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P041, 0x29, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x29)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P042, 0x2A, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x2A)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P043, 0x2B, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x2B)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P044, 0x2C, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x2C)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P045, 0x2D, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x2D)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P046, 0x2E, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x2E)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P047, 0x2F, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x2F)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P048, 0x30, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x30)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P049, 0x31, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x31)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P050, 0x32, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x32)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P051, 0x33, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x33)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P052, 0x34, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x34)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P053, 0x35, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x35)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P054, 0x36, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x36)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P055, 0x37, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x37)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P056, 0x38, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x38)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P057, 0x39, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x39)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P058, 0x3A, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x3A)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P059, 0x3B, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x3B)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P060, 0x3C, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x3C)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P061, 0x3D, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x3D)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P062, 0x3E, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x3E)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P063, 0x3F, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x3F)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+
+        Processor (P064, 0x40, 0x00000000, 0x00)
+        {
+            Name (PNUM, 0x40)
+            Method (_STA, 0, NotSerialized)
+            {
+                Return (PSTA (PNUM))
+            }
+        }
+    }
+
+    //
+    // Older versions of macOS before 10.6 do not support conditional definitions
+    // and will always expose the objects.
+    // Re-evaluate in each object's _STA function as a workaround.
+    //
+    // Serial port devices.
+    //
+    If (LGreater (SCFG, Zero))
+    {
+        Scope (\_SB.UAR1)
+        {
+            Method (_STA, 0, NotSerialized)
+            {
+                If (LGreater (SCFG, Zero))
+                {
+                    Return (0x0F)
+                }
+
+                Return (Zero)
+            }
+        }
+
+        Scope (\_SB.UAR2)
+        {
+            Method (_STA, 0, NotSerialized)
+            {
+                If (LGreater (SCFG, Zero))
+                {
+                    Return (0x0F)
+                }
+
+                Return (Zero)
+            }
+        }
+    }
+
+    //
+    // TPM device.
+    //
+    If (LGreater (TCFG, Zero))
+    {
+        Scope (\_SB.VMOD.TPM2)
+        {
+            Method (_STA, 0, NotSerialized)
+            {
+                If (LGreater (TCFG, Zero))
+                {
+                    Return (\_SB.VMOD.TPM2.XSTA())
+                }
+
+                Return (Zero)
+            }
+        }
+    }
+
+    //
+    // NVDIMM device.
+    //
+    If (LGreater (NCFG, Zero))
+    {
+        Scope (\_SB.NVDR)
+        {
+            Method (_STA, 0, NotSerialized)
+            {
+                If (LGreater (NCFG, Zero))
+                {
+                    Return (\_SB.NVDR.XSTA())
+                }
+
+                Return (Zero)
+            }
+        }
+    }
+
+    //
+    // Enclave Page Cache device.
+    //
+    If (LGreater (SGXE, Zero))
+    {
+        Scope (\_SB.EPC)
+        {
+            Method (_STA, 0, NotSerialized)
+            {
+                If (LGreater (SGXE, Zero))    
+                {
+                    Return (\_SB.EPC.XSTA())
+                }
+
+                Return (Zero)
+            }
+        }
+    }
+
+    //
+    // Battery and AC adapter device.
+    //
+    If (LGreater (BCFG, Zero))
+    {
+        Scope (\_SB.VMOD.BAT1)
+        {
+            Method (_STA, 0, NotSerialized)
+            {
+                If (LGreater (BCFG, Zero))
+                {
+                    Return (\_SB.VMOD.BAT1.XSTA())
+                }
+
+                Return (Zero)
+            }
+        }
+
+        Scope (\_SB.VMOD.AC1)
+        {
+            Method (_STA, 0, NotSerialized)
+            {
+                If (LGreater (BCFG, Zero))
+                {
+                    Return (0x0F)
+                }
+
+                Return (Zero)
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-HV-PLUG.dsl

@@ -0,0 +1,30 @@
+/*
+ * Hyper-V CPU plugin-type SSDT to enable VMPlatformPlugin on Big Sur and newer.
+ *
+ * This SSDT must be loaded after SSDT-HV-DEV.dsl
+ */
+
+DefinitionBlock ("", "SSDT", 2, "ACDT", "HVPLUG", 0x00000000)
+{
+    External (\_SB.P001, ProcessorObj)
+
+    Scope (\_SB.P001)
+    {
+        If (_OSI ("Darwin"))
+        {
+            Method (_DSM, 4, NotSerialized)  
+            {
+                If (LEqual (Arg2, Zero))
+                {
+                    Return (Buffer () { 0x03 })
+                }
+
+                Return (Package ()
+                {
+                    "plugin-type", 
+                    0x02
+                })
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-HV-VMBUS.dsl

@@ -0,0 +1,54 @@
+/*
+ * Hyper-V VMBUS SSDT to enable ACPI node identification.
+ *
+ * AppleACPIPlatform requires standard _HID values for proper EFI device
+ * path generation, and will not work with the default string values Hyper-V provides.
+ *
+ * Requires the following ACPI patches:
+ * (1) Base:            \_SB.VMOD
+ *     Comment:         _HID to XHID rename (Hyper-V VMOD)
+ *     Count:           1
+ *     Find:            5F484944 (_HID)
+ *     Replace:         58484944 (XHID)
+ *     TableSignature:  44534454 (DSDT)
+ * (2) Base:            \_SB.VMOD.VMBS
+ *     Comment:         _HID to XHID rename (Hyper-V VMBus)
+ *     Count:           1
+ *     Find:            5F484944 (_HID)
+ *     Replace:         58484944 (XHID)
+ *     TableSignature:  44534454 (DSDT)
+ */
+
+DefinitionBlock ("", "SSDT", 2, "ACDT", "HVVMBUS", 0x00000000)
+{
+    External (\_SB.VMOD, DeviceObj)
+    External (\_SB.VMOD.XHID, MethodObj)
+    External (\_SB.VMOD.VMBS, DeviceObj)
+    External (\_SB.VMOD.VMBS.XHID, MethodObj)
+
+    Scope (\_SB.VMOD)
+    {
+        Method (_HID, 0, NotSerialized)
+        {
+            If (_OSI ("Darwin"))
+            {
+                Return (EisaId ("VMD0001"))
+            }
+
+            Return (\_SB.VMOD.XHID())
+        }
+    }
+
+    Scope (\_SB.VMOD.VMBS)
+    {
+        Method (_HID, 0, NotSerialized)
+        {
+            If (_OSI ("Darwin"))
+            {
+                Return (EisaId ("VBS0001"))
+            }
+
+            Return (\_SB.VMOD.VMBS.XHID())
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-IMEI.dsl

@@ -0,0 +1,28 @@
+/*
+ * Only necessary when no IMEI device (with any name) is present in the DSDT and a custom device-id
+ * is needed to be set via DeviceProperties (some Sandy Bridge or Ivy Bridge configurations).
+ */
+DefinitionBlock ("", "SSDT", 2, "ACDT", "IMEI", 0x00000000)
+{
+    External (_SB_.PCI0, DeviceObj)
+
+    Scope (_SB.PCI0)
+    {
+        Device (IMEI)
+        {
+            Name (_ADR, 0x00160000)  // _ADR: Address
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Return (0x0F)
+                }
+                Else
+                {
+                    Return (Zero)
+                }
+            }
+        }
+    }
+}
+

hackintosh-guide/docs/AcpiSamples/Source/SSDT-PLUG.dsl

@@ -0,0 +1,151 @@
+/*
+ * XCPM power management compatibility table with Darwin method.
+ *
+ * Please note that this table is only a sample and may need to be
+ * adapted to fit your board's ACPI stack. For instance, both scope
+ * and device name may vary (e.g. _SB_.PR00 instead of _PR_.CPU0).
+ *
+ * While the table contains several examples of CPU paths, you should
+ * remove all the ones irrelevant for your board.
+ */
+DefinitionBlock ("", "SSDT", 2, "ACDT", "CpuPlug", 0x00003000)
+{
+    External (_SB_.CPU0, ProcessorObj)
+    External (_PR_.CPU0, ProcessorObj)
+    External (_PR_.CP00, ProcessorObj)
+    External (_PR_.C000, ProcessorObj)
+    External (_PR_.P000, ProcessorObj)
+    External (_SB_.PR00, ProcessorObj)
+    External (_PR_.PR00, ProcessorObj)
+    External (_SB_.SCK0.CP00, ProcessorObj)
+    External (_SB_.SCK0.PR00, ProcessorObj)
+
+    Method (PMPM, 4, NotSerialized) {
+       If (LEqual (Arg2, Zero)) {
+           Return (Buffer (One) { 0x03 })
+       }
+
+       Return (Package (0x02)
+       {
+           "plugin-type", 
+           One
+       })
+    }
+
+    If (CondRefOf (\_SB.CPU0)) {
+        If ((ObjectType (\_SB.CPU0) == 0x0C)) {
+            Scope (\_SB.CPU0) {
+                If (_OSI ("Darwin")) {
+                    Method (_DSM, 4, NotSerialized)  
+                    {
+                        Return (PMPM (Arg0, Arg1, Arg2, Arg3))
+                    }
+                }
+            }
+        }
+    }
+    
+    If (CondRefOf (\_PR.CPU0)) {
+        If ((ObjectType (\_PR.CPU0) == 0x0C)) {
+            Scope (\_PR.CPU0) {
+                If (_OSI ("Darwin")) {
+                    Method (_DSM, 4, NotSerialized)  
+                    {
+                        Return (PMPM (Arg0, Arg1, Arg2, Arg3))
+                    }
+                }
+            }
+        }
+    }
+
+    If (CondRefOf (\_SB.PR00)) {
+        If ((ObjectType (\_SB.PR00) == 0x0C)) {
+            Scope (\_SB.PR00) {
+                If (_OSI ("Darwin")) {
+                    Method (_DSM, 4, NotSerialized)  
+                    {
+                        Return (PMPM (Arg0, Arg1, Arg2, Arg3))
+                    }
+                }
+            }
+        }
+    }
+
+    If (CondRefOf (\_PR.CP00)) {
+        If ((ObjectType (\_PR.CP00) == 0x0C)) {
+            Scope (\_PR.CP00) {
+                If (_OSI ("Darwin")) {
+                    Method (_DSM, 4, NotSerialized)  
+                    {
+                        Return (PMPM (Arg0, Arg1, Arg2, Arg3))
+                    }
+                }
+            }
+        }
+    }
+
+    If (CondRefOf (\_PR.C000)) {
+        If ((ObjectType (\_PR.C000) == 0x0C)) {
+            Scope (\_PR.C000) {
+                If (_OSI ("Darwin")) {
+                    Method (_DSM, 4, NotSerialized)  
+                    {
+                        Return (PMPM (Arg0, Arg1, Arg2, Arg3))
+                    }
+                }
+            }
+        }
+    }
+    
+    If (CondRefOf (\_PR.P000)) {
+        If ((ObjectType (\_PR.P000) == 0x0C)) {
+            Scope (\_PR.P000) {
+                If (_OSI ("Darwin")) {
+                    Method (_DSM, 4, NotSerialized)  
+                    {
+                        Return (PMPM (Arg0, Arg1, Arg2, Arg3))
+                    }
+                }
+            }
+        }
+    }
+    
+    If (CondRefOf (\_PR.PR00)) {
+        If ((ObjectType (\_PR.PR00) == 0x0C)) {
+            Scope (\_PR.PR00) {
+                If (_OSI ("Darwin")) {
+                    Method (_DSM, 4, NotSerialized)  
+                    {
+                        Return (PMPM (Arg0, Arg1, Arg2, Arg3))
+                    }
+                }
+            }
+        }
+    }
+
+    If (CondRefOf (\_SB.SCK0.CP00)) {
+        If ((ObjectType (\_SB.SCK0.CP00) == 0x0C)) {
+            Scope (\_SB.SCK0.CP00) {
+                If (_OSI ("Darwin")) {
+                    Method (_DSM, 4, NotSerialized)  
+                    {
+                        Return (PMPM (Arg0, Arg1, Arg2, Arg3))
+                    }
+                }
+            }
+        }
+    }
+
+    If (CondRefOf (\_SB.SCK0.PR00)) {
+        If ((ObjectType (\_SB.SCK0.PR00) == 0x0C)) {
+            Scope (\_SB.SCK0.PR00) {
+                If (_OSI ("Darwin")) {
+                    Method (_DSM, 4, NotSerialized)  
+                    {
+                        Return (PMPM (Arg0, Arg1, Arg2, Arg3))
+                    }
+                }
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-PMC.dsl

@@ -0,0 +1,54 @@
+/*
+ * Intel 300-series PMC support for macOS
+ *
+ * Starting from Z390 chipsets PMC (D31:F2) is only available through MMIO.
+ * Since there is no standard device for PMC in ACPI, Apple introduced its
+ * own naming "APP9876" to access this device from AppleIntelPCHPMC driver.
+ * To avoid confusion we disable this device for all other operating systems,
+ * as they normally use another non-standard device with "PNP0C02" HID and
+ * "PCHRESV" UID.
+ *
+ * On certain implementations, including APTIO V, PMC initialisation is
+ * required for NVRAM access. Otherwise it will freeze in SMM mode.
+ * The reason for this is rather unclear. Note, that PMC and SPI are
+ * located in separate memory regions and PCHRESV maps both, yet only
+ * PMC region is used by AppleIntelPCHPMC:
+ * 0xFE000000~0xFE00FFFF - PMC MBAR
+ * 0xFE010000~0xFE010FFF - SPI BAR0
+ * 0xFE020000~0xFE035FFF - SerialIo BAR in ACPI mode
+ *
+ * PMC device has nothing to do to LPC bus, but is added to its scope for
+ * faster initialisation. If we add it to PCI0, where it normally exists,
+ * it will start in the end of PCI configuration, which is too late for
+ * NVRAM support.
+ */
+DefinitionBlock ("", "SSDT", 2, "ACDT", "PMCR", 0x00001000)
+{
+    External (_SB_.PCI0.LPCB, DeviceObj)
+
+    Scope (_SB.PCI0.LPCB)
+    {
+        Device (PMCR)
+        {
+            Name (_HID, EisaId ("APP9876"))  // _HID: Hardware ID
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Return (0x0B)
+                }
+                Else
+                {
+                    Return (Zero)
+                }
+            }
+            Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
+            {
+                Memory32Fixed (ReadWrite,
+                    0xFE000000,         // Address Base
+                    0x00010000,         // Address Length
+                    )
+            })
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-PNLF.dsl

@@ -0,0 +1,237 @@
+// Adding PNLF device for WhateverGreen.kext and others.
+// This is a modified PNLF version originally taken from RehabMan/OS-X-Clover-Laptop-Config repository:
+// https://raw.githubusercontent.com/RehabMan/OS-X-Clover-Laptop-Config/master/hotpatch/SSDT-PNLF.dsl
+// Rename GFX0 to anything else if your IGPU name is different.
+//
+// Licensed under GNU General Public License v2.0
+// https://github.com/RehabMan/OS-X-Clover-Laptop-Config/blob/master/License.md
+
+#define FBTYPE_SANDYIVY 1
+#define FBTYPE_HSWPLUS 2
+#define FBTYPE_CFL 3
+
+#define SANDYIVY_PWMMAX 0x710
+#define HASWELL_PWMMAX 0xad9
+#define SKYLAKE_PWMMAX 0x56c
+#define CUSTOM_PWMMAX_07a1 0x07a1
+#define CUSTOM_PWMMAX_1499 0x1499
+#define COFFEELAKE_PWMMAX 0xffff
+
+DefinitionBlock ("", "SSDT", 2, "ACDT", "PNLF", 0)
+{
+    External (RMCF.BKLT, IntObj)
+    External (RMCF.LMAX, IntObj)
+    External (RMCF.LEVW, IntObj)
+    External (RMCF.GRAN, IntObj)
+    External (RMCF.FBTP, IntObj)
+    External (_SB_.PCI0.GFX0, DeviceObj)
+    
+    If (_OSI ("Darwin")) {
+        Scope (\_SB.PCI0.GFX0)
+        {
+            OperationRegion (RMP3, PCI_Config, Zero, 0x14)
+
+            // For backlight control
+            Device (PNLF)
+            {
+                Name (_HID, EisaId("APP0002"))
+                Name (_CID, "backlight")
+                // _UID is set depending on PWMMax to match profiles in WhateverGreen.kext https://github.com/acidanthera/WhateverGreen/blob/1.4.7/WhateverGreen/kern_weg.cpp#L32
+                // 14: Sandy/Ivy 0x710
+                // 15: Haswell/Broadwell 0xad9
+                // 16: Skylake/KabyLake 0x56c (and some Haswell, example 0xa2e0008)
+                // 17: custom LMAX=0x7a1
+                // 18: custom LMAX=0x1499
+                // 19: CoffeeLake 0xffff
+                // 99: Other (requires custom profile using WhateverGreen.kext via DeviceProperties applbkl-name and applbkl-data)
+                Name (_UID, 0)
+                Name (_STA, 0x0B)
+        
+                Field (^RMP3, AnyAcc, NoLock, Preserve)
+                {
+                    Offset (0x02), GDID,16,
+                    Offset (0x10), BAR1,32,
+                }
+
+                // IGPU PWM backlight register descriptions:
+                //   LEV2 not currently used
+                //   LEVL level of backlight in Sandy/Ivy
+                //   P0BL counter, when zero is vertical blank
+                //   GRAN see description below in INI1 method
+                //   LEVW should be initialized to 0xC0000000
+                //   LEVX PWMMax except FBTYPE_HSWPLUS combo of max/level (Sandy/Ivy stored in MSW)
+                //   LEVD level of backlight for Coffeelake
+                //   PCHL not currently used
+                OperationRegion (RMB1, SystemMemory, BAR1 & ~0xF, 0xe1184)
+                Field(RMB1, AnyAcc, Lock, Preserve)
+                {
+                    Offset (0x48250),
+                    LEV2, 32,
+                    LEVL, 32,
+                    Offset (0x70040),
+                    P0BL, 32,
+                    Offset (0xc2000),
+                    GRAN, 32,
+                    Offset (0xc8250),
+                    LEVW, 32,
+                    LEVX, 32,
+                    LEVD, 32,
+                    Offset (0xe1180),
+                    PCHL, 32,
+                }
+
+                // INI1 is common code used by FBTYPE_HSWPLUS and FBTYPE_CFL
+                Method (INI1, 1)
+                {
+                    // INTEL OPEN SOURCE HD GRAPHICS, INTEL IRIS GRAPHICS, AND INTEL IRIS PRO GRAPHICS PROGRAMMER'S REFERENCE MANUAL (PRM)
+                    // FOR THE 2015-2016 INTEL CORE PROCESSORS, CELERON PROCESSORS AND PENTIUM PROCESSORS BASED ON THE "SKYLAKE" PLATFORM
+                    // Volume 12: Display (https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol12-display.pdf)
+                    //   page 189
+                    //   Backlight Enabling Sequence
+                    //   Description
+                    //   1. Set frequency and duty cycle in SBLC_PWM_CTL2 Backlight Modulation Frequency and Backlight Duty Cycle.
+                    //   2. Set granularity in 0xC2000 bit 0 (0 = 16, 1 = 128).
+                    //   3. Enable PWM output and set polarity in SBLC_PWM_CTL1 PWM PCH Enable and Backlight Polarity.
+                    //   4. Change duty cycle as needed in SBLC_PWM_CTL2 Backlight Duty Cycle.
+                    // This 0xC value comes from looking what OS X initializes this
+                    // register to after display sleep (using ACPIDebug/ACPIPoller)
+                    If (0 == (2 & Arg0))
+                    {
+                        Local5 = 0xC0000000
+                        If (CondRefOf(\RMCF.LEVW)) { If (Ones != \RMCF.LEVW) { Local5 = \RMCF.LEVW } }
+                        ^LEVW = Local5
+                    }
+                    // from step 2 above (you may need 1 instead)
+                    If (4 & Arg0)
+                    {
+                        If (CondRefOf(\RMCF.GRAN)) { ^GRAN = \RMCF.GRAN }
+                        Else { ^GRAN = 0 }
+                    }
+                }
+
+                Method (_INI)
+                {
+                    // IntelBacklight.kext takes care of this at load time...
+                    // If RMCF.BKLT does not exist, it is assumed you want to use AppleBacklight.kext...
+                    Local4 = 1
+                    If (CondRefOf(\RMCF.BKLT)) { Local4 = \RMCF.BKLT }
+                    If (!(1 & Local4)) { Return }
+
+                    // Adjustment required when using WhateverGreen.kext
+                    Local0 = ^GDID
+                    Local2 = Ones
+                    If (CondRefOf(\RMCF.LMAX)) { Local2 = \RMCF.LMAX }
+                    // Determine framebuffer type (for PWM register layout)
+                    Local3 = 0
+                    If (CondRefOf(\RMCF.FBTP)) { Local3 = \RMCF.FBTP }
+
+                    // Now fixup the backlight PWM depending on the framebuffer type
+                    // At this point:
+                    //   Local4 is RMCF.BLKT value, if specified (default is 1)
+                    //   Local0 is device-id for IGPU
+                    //   Local2 is LMAX, if specified (Ones means based on device-id)
+                    //   Local3 is framebuffer type
+
+                    // check Sandy/Ivy
+                    If (FBTYPE_SANDYIVY == Local3 || Ones != Match(Package()
+                    {
+                        // Sandy HD3000
+                        0x010b, 0x0102,
+                        0x0106, 0x1106, 0x1601, 0x0116, 0x0126,
+                        0x0112, 0x0122,
+                        // Ivy
+                        0x0152, 0x0156, 0x0162, 0x0166,
+                        0x016a,
+                        // Arrandale
+                        0x0046, 0x0042,
+                    }, MEQ, Local0, MTR, 0, 0))
+                    {
+                        if (Ones == Local2) { Local2 = SANDYIVY_PWMMAX }
+                        // change/scale only if different than current...
+                        Local1 = ^LEVX >> 16
+                        If (!Local1) { Local1 = Local2 }
+                        If (!(8 & Local4) && Local2 != Local1)
+                        {
+                            // set new backlight PWMMax but retain current backlight level by scaling
+                            Local0 = (^LEVL * Local2) / Local1
+                            //REVIEW: wait for vblank before setting new PWM config
+                            //For (Local7 = ^P0BL, ^P0BL == Local7, ) { }
+                            Local3 = Local2 << 16
+                            If (Local2 > Local1)
+                            {
+                                // PWMMax is getting larger... store new PWMMax first
+                                ^LEVX = Local3
+                                ^LEVL = Local0
+                            }
+                            Else
+                            {
+                                // otherwise, store new brightness level, followed by new PWMMax
+                                ^LEVL = Local0
+                                ^LEVX = Local3
+                            }
+                        }
+                    }
+                    // check CoffeeLake and later
+                    ElseIf (FBTYPE_CFL == Local3 || Ones != Match(Package()
+                    {
+                        // CoffeeLake and Whiskey Lake and CometLake and IceLake
+                        0x3e9b, 0x3ea5, 0x3e92, 0x3e91, 0x3EA0, 0x3EA6, 0x3E98, 
+                        0x9BC8, 0x9BC5, 0x9BC4, 0xFF05, 0x8A70, 0x8A71, 0x8A51, 
+                        0x8A5C, 0x8A5D, 0x8A52, 0x8A53, 0x8A56, 0x8A5A, 0x8A5B, 
+                        0x9B41, 0x9B21, 0x9BCA, 0x9BA4,
+                    }, MEQ, Local0, MTR, 0, 0))
+                    {
+                        if (Ones == Local2) { Local2 = COFFEELAKE_PWMMAX }
+                    }
+                    // otherwise must be Haswell/Broadwell/Skylake/KabyLake/KabyLake-R (FBTYPE_HSWPLUS)
+                    Else
+                    {
+                        if (Ones == Local2)
+                        {
+                            // check Haswell and Broadwell, as they are both 0xad9 (for most common ig-platform-id values)
+                            If (Ones != Match(Package()
+                            {
+                                // Haswell
+                                0x0d26, 0x0a26, 0x0d22, 0x0412, 0x0416, 0x0a16, 0x0a1e, 0x0a1e, 0x0a2e, 0x041e, 0x041a,
+                                // Broadwell
+                                0x0bd1, 0x0bd2, 0x0BD3, 0x1606, 0x160e, 0x1616, 0x161e, 0x1626, 0x1622, 0x1612, 0x162b,
+                            }, MEQ, Local0, MTR, 0, 0))
+                            {
+                                Local2 = HASWELL_PWMMAX
+                            }
+                            Else
+                            {
+                                // assume Skylake/KabyLake/KabyLake-R, both 0x56c
+                                // 0x1916, 0x191E, 0x1926, 0x1927, 0x1912, 0x1932, 0x1902, 0x1917, 0x191b,
+                                // 0x5916, 0x5912, 0x591b, others...
+                                Local2 = SKYLAKE_PWMMAX
+                            }
+                        }
+                        INI1 (Local4)
+                        // change/scale only if different than current...
+                        Local1 = ^LEVX >> 16
+                        If (!Local1) { Local1 = Local2 }
+                        If (!(8 & Local4) && Local2 != Local1)
+                        {
+                            // set new backlight PWMAX but retain current backlight level by scaling
+                            Local0 = (((^LEVX & 0xFFFF) * Local2) / Local1) | (Local2 << 16)
+                            //REVIEW: wait for vblank before setting new PWM config
+                            //For (Local7 = ^P0BL, ^P0BL == Local7, ) { }
+                            ^LEVX = Local0
+                        }
+                    }
+
+                    // Now Local2 is the new PWMMax, set _UID accordingly
+                    // The _UID selects the correct entry in WhateverGreen.kext
+                    If (Local2 == SANDYIVY_PWMMAX) { _UID = 14 }
+                    ElseIf (Local2 == HASWELL_PWMMAX) { _UID = 15 }
+                    ElseIf (Local2 == SKYLAKE_PWMMAX) { _UID = 16 }
+                    ElseIf (Local2 == CUSTOM_PWMMAX_07a1) { _UID = 17 }
+                    ElseIf (Local2 == CUSTOM_PWMMAX_1499) { _UID = 18 }
+                    ElseIf (Local2 == COFFEELAKE_PWMMAX) { _UID = 19 }
+                    Else { _UID = 99 } 
+                }
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-RTC0-RANGE.dsl

@@ -0,0 +1,105 @@
+/*
+ * On certain motherboards(mainly Asus X299 boards), not all ports are
+ * mapped in the RTC device. For the majority of the time, users will not notice 
+ * this issue though in extreme circumstances macOS may halt in early booting.
+ * Most prominently seen around the PCI Configuration stage with macOS 11 Big Sur.
+ * 
+ * To resolve this, we'll want to create a new RTC device(PNP0B00) with the correct
+ * range.
+ * 
+ * Note that due to AWAC systems having an _STA method already defined, attempting
+ * to set another _STA method in your RTC device will conflict. To resolve this,
+ * SSDT-AWAC should be removed and instead opt for this SSDT instead.
+ */
+DefinitionBlock ("", "SSDT", 2, "ACDT", "RtcRange", 0x00000000)
+{
+    External (_SB_.PC00.LPC0, DeviceObj)
+    External (_SB_.PC00.LPC0.RTC_, DeviceObj)
+
+    Scope (_SB.PC00.LPC0)
+    {
+       /* 
+        * Uncomment below if your ACPI doesn't have an AWAC device(ACPI000E)
+        */
+       /*
+        Scope (RTC)
+        {
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Return (Zero)
+                }
+                Else
+                {
+                    Return (0x0F)
+                }
+            }
+        }
+        */
+        
+        Device (RTC0)
+        {
+           /*
+            * Change the below _CSR range to match your hardware.
+            *
+            * For this example, we'll use the Asus Strix X299-E Gaming's ACPI, and show how to correct it.
+            * Within the original RTC device, we see that sections 0x70 through 0x77 are mapped:
+            *
+            *    Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
+            *    {
+            *        IO (Decode16,
+            *            0x0070,             // Range Minimum 1
+            *            0x0070,             // Range Maximum 1
+            *            0x01,               // Alignment 1
+            *            0x02,               // Length 1
+            *           )
+            *        IO (Decode16,
+            *            0x0074,             // Range Minimum 2
+            *            0x0074,             // Range Maximum 2
+            *            0x01,               // Alignment 2
+            *            0x04,               // Length 2
+            *           )
+            *        IRQNoFlags ()
+            *            {8}
+            *    })
+            *
+            * Though Asus seems to have forgotten to map sections 0x72 and 0x73 in the first bank, so
+            * we'll want to expand the range to include them under Length 1.
+            * Note that not all boards will be the same, verify with your ACPI tables for both the range and 
+            * missing regions.
+            */
+            
+            Name (_HID, EisaId ("PNP0B00"))  // _HID: Hardware ID
+            Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
+            {
+                IO (Decode16,
+                    0x0070,             // Range Minimum 1
+                    0x0070,             // Range Maximum 1
+                    0x01,               // Alignment 1
+                    0x04,               // Length 1      (Expanded to include 0x72 and 0x73)
+                    )
+                IO (Decode16,
+                    0x0074,             // Range Minimum 2
+                    0x0074,             // Range Maximum 2
+                    0x01,               // Alignment 2
+                    0x04,               // Length 2
+                    )
+                IRQNoFlags ()
+                    {8}
+            })
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Return (0x0F)
+                }
+                Else
+                {
+                    Return (Zero)
+                }
+            }
+        }
+    }
+}
+

hackintosh-guide/docs/AcpiSamples/Source/SSDT-RTC0.dsl

@@ -0,0 +1,39 @@
+/*
+ * For 300-series only and occasions where SSDT-AWAC is not applicable, 
+ * which requires variable STAS to be present.
+ *
+ * On some boards RTC device is disabled by returning 0 from _STA status method and
+ * to enable it 0xF will be returned as expected by macOS.
+ */
+
+DefinitionBlock ("", "SSDT", 2, "ACDT", "RTC0", 0x00000000)
+{
+    External (_SB_.PCI0.LPCB, DeviceObj)    // (from opcode)
+
+    Scope (_SB.PCI0.LPCB)
+    {
+        Device (RTC0)
+        {
+            Name (_HID, EisaId ("PNP0B00"))  // _HID: Hardware ID
+            Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
+            {
+                IO (Decode16,
+                    0x0070,             // Range Minimum
+                    0x0070,             // Range Maximum
+                    0x01,               // Alignment
+                    0x08,               // Length
+                    )
+                IRQNoFlags ()
+                    {8}
+            })
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin")) {
+                    Return (0x0F)
+                } Else {
+                    Return (0);
+                }
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-SBUS-MCHC.dsl

@@ -0,0 +1,80 @@
+/*
+ * SMBus compatibility table.
+ */
+DefinitionBlock ("", "SSDT", 2, "ACDT", "MCHCSBUS", 0x00000000)
+{
+    External (_SB_.PCI0, DeviceObj)
+    External (_SB_.PCI0.SBUS, DeviceObj)
+
+    Scope (_SB.PCI0)
+    {
+        Device (MCHC)
+        {
+            Name (_ADR, Zero)  // _ADR: Address
+            Method (_STA, 0, NotSerialized)  // _STA: Status
+            {
+                If (_OSI ("Darwin"))
+                {
+                    Return (0x0F)
+                }
+                Else
+                {
+                    Return (Zero)
+                }
+            }
+        }
+    }
+
+    Device (_SB.PCI0.SBUS.BUS0)
+    {
+        Name (_CID, "smbus")  // _CID: Compatible ID
+        Name (_ADR, Zero)  // _ADR: Address
+
+        /*
+         * Uncomment replacing 0x57 with your own value which might be found
+         * in SMBus section of Intel datasheet for your motherboard.
+         *
+         * The "diagsvault" is the diagnostic vault where messages are stored.
+         * It's located at address 87 (0x57) on the SMBus controller.
+         * While "diagsvault" may refer to diags, a hardware diagnosis program via EFI for Macs
+         * that communicates with the SMBus controller, the effect is really unknown for hacks.
+         * Uncomment this with caution.
+         */
+
+        /**
+        Device (DVL0)
+        {
+            Name (_ADR, 0x57)  // _ADR: Address
+            Name (_CID, "diagsvault")  // _CID: Compatible ID
+            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
+            {
+                If (!Arg2)
+                {
+                    Return (Buffer (One)
+                    {
+                         0x57                                             // W
+                    })
+                }
+
+                Return (Package (0x02)
+                {
+                    "address", 
+                    0x57
+                })
+            }
+        }
+        **/
+
+        Method (_STA, 0, NotSerialized)  // _STA: Status
+        {
+            If (_OSI ("Darwin"))
+            {
+                Return (0x0F)
+            }
+            Else
+            {
+                Return (Zero)
+            }
+        }
+    }
+}

hackintosh-guide/docs/AcpiSamples/Source/SSDT-UNC.dsl

@@ -0,0 +1,32 @@
+/*
+ * Discovered on X99-series.
+ * These platforms have uncore PCI bridges for 4 CPU sockets
+ * present in ACPI despite having none physically.
+ *
+ * Under normal conditions these are disabled depending on
+ * CPU presence in the socket via Processor Bit Mask (PRBM),
+ * but on X99 this code is unused or broken as such bridges
+ * simply do not exist. We fix that by writing 0 to PRBM.
+ *
+ * Doing so is important as starting with macOS 11 IOPCIFamily
+ * will crash as soon as it sees non-existent PCI bridges.
+ */
+
+DefinitionBlock ("", "SSDT", 2, "ACDT", "UNC", 0x00000000)
+{
+    External (_SB.UNC0, DeviceObj)
+    External (PRBM, IntObj)
+
+    Scope (_SB.UNC0)
+    {
+        Method (_INI, 0, NotSerialized)
+        {
+            // In most cases this patch does benefit all operating systems,
+            // yet on select pre-Windows 10 it may cause issues.
+            // Remove If (_OSI ("Darwin")) in case you have none.
+            If (_OSI ("Darwin")) {
+                PRBM = 0
+            }
+        }
+    }
+}